Hi All,
I'm running 16.6-S026 on a Win 7 64 bit laptop.
For the past few days I've been unable to get into Part Developer. I open the project manager and open a schematic.
Click Tools > Library Tools > Part Developer. The Part Developer splash screen comes up, but the Part Developer never opens.
No errors, no messages, it just freezes. I can still use the rest of the laptop. It's just the Part Developer that stops responding.
I have to End Task. Has this happened to anyone else?
Thanks!
Bob
Hi,
I have 200 DACs and buffer opamps in my design. Is there a way to create a schematic/netlist in Capture CIS without copying one by one all the sub units.
I am fine tuning the package height properties in my designs in order to use them in the 3D View in Allegro, as well as export them to our Mechanical Engineer for use in ProE.
I've got most everything working to get the height property from capture to allegro, but I was wondering where in Allegro I can set the default height of components that do not have the height property from capture? I would like to set these to some exhorbent height, so that when I look at the design in 3D View, I can see what compents need to have their schematic symbol edited to include the proper height property.
Thanks.
--Mark
I want to add, or really append, a new menu item to the Allgro PCB Editor menu. What is the easiest way to handle this without having to modify the installed menu? Maybe someone has an example that I could follow?
Hi,
I meet a strange problem. I have a Micro HDMI connector with 4 through mounting holes. I create the NC drill file and use PCB viewer check the drill file. I found that there is not drill hole at all for this HDMI connector.
I could not find problem at all.
Thanks
Hi,
I am doing hierarchical design in my project and in all our group use the same hierarchical schematic.
I am in the process of creating the base schematic for the hierachical design.
I have a doubt that whether we can able to paste some text from hierachicakl design to the main schematic hierachical block.
i.e while drawing the hierachical block,the text should automatically come from base hierachical design.Please help me is any option is there like this.
I have a new dilemma this morning. I have an array of 30 vias that I need to embed in the tab of a TO package. My first curse of action was to add the VIA at the board. This led to inconsistent hookup to VIA, as little as 15 vias were hooked up out of a required 30. I tried dropping a shape over the vias to get them all to hook up but no go. There is also a requirement for a match shape on the bottom of the board. I went in the symbol level and attempted to add vias there. The tool promptly responded with DRCs(pad->pad) errors. How do I fix this? See attached picts, that will tell the story. I need to stick 30 vias onto pi4. Thanks.
-Ron Scott
I'm looking for a way to make a Capture library generated in 16.0 compatible with 16.6? Or a design generated in 16.6 compatible with 16.0.
How can I change the allowable character limit for reference designator in Capture CIS. I am getting the following error while generating netlist.
WARNING: Reference is too long 'UD_COL-1', truncated to UD_COL
Hi all.
So here's a fun one. I have an SMA connector footprint (I've inherited), that includes a shape on the top layer, obstensibly for impedance control reasons. Now here is where things get interesting. I've had to change some of the padstacks to accomodate the more relaxed (read: sane) specs of a fab house. Suddenly the changed padstacks show as having a DRC error. Reverting to the unchanged file, and examining the padstacks; I see they were flagged as "element is on a dummy net", as is the shape that straddles the bunch of them.
How was this ever accomplished? I understand that this will get taken care of when I place the part on a schematic and assign pins to a net, but the why and how seems like it might be important.
I can see no mechanism in the symbol editor to do this. I've even tried the enved command, followed by enabling logic_edit_enabled as I found discussed online, but this didn't result in anything helpful in menus, nor a working "net logic" command, as I suspect this is specific to Allegro proper, not the symbol editor. The .dra files appear to be some vulgar binary format, so no clues are evident in a text editor :(
I can find all sorts of peripheral issues, but nothing in my forum searching addressed this exact issue. Can someone please shed some light on how this was done?
Thanks a bunch in advance,
-Mike
I do drawings of 0.5" PCBs and some 12" PCBs. I want a frame with instructions.
Regardless of PCB size, I want the PCB image to mostlly fill the frame. I've been importing different sized DXFs.Is there a better way?
Can I make a frame that is somehow changeable in size that I can just wrap around my PCB drawing?
Hi ,
I am getting attached error while opening schematic in orcad capture .the source schematic done in SDT schematic .sch.
What should i do to make it open in OracadCapture.
Regards,
Girish Kumar
Hello all,
I am new to the using of the pspice model editor, Can anyone help me in giving a brief idea regarding how to model a NEMS switch based on its I-V characteristics.
Please help me in this regard
Thanks
Revanth Rajalbandi
I open Setup>Grid in PCB Editor. How can I choose all these Offsets and Spacings ?
All,
Thsi poat is re-visited because I couldn't make it work the last time and had to kluge my way through my design. My situation is that I have a FET with a large pin. I need to add an array of 30(6x5) vias in the symbopl on that large pin to use as a thermal array. There was several suggestions but I couldn't get these to work and had to move on. I'm back asking for advise. Any hints will be helpful as I am am coming up on schedule.I'll attach a screen shot that will show the problem.
Thanks,.
Ron Scott CID+
ron.scott@halla.com
Hi there,
I want to change the value of the parts in DE HDL, but it doesn't work!
+ If "VALUE" is key property, its value can't not be changed.
+ If "VALUE" is injected property, the value in PCB Editor is still the value in part table, not the changed value in DE HDL.
I want to change the value of some part like push button, that can't be set in the part table. What should I do?
Thank you so much.
I am looking for a command to cut lines on silk ?
I have loaded an netlist in the PCB editor and since the symbols are not placed I cannot see any of the symbols. I know they are there since Place/Manual shows all the reference designators. Why can't I see the symbols ?
I then used Quickplace and all the symbols are located on the right side of the board. I want to be able to select certain reference designators to group the symbols. When I goto Manual Place there are now no reference designators. How do you select a group of reference designators ?
Is there anything that explains the differentces between unplaced and placed symbols ?
TIA Lenny