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Add Connect does not snap to pins the same as F3.
I have been using the RMB add connect to add clines. When I use that instead of the add connect ICON the clines do not snap to pins. The snap to connect is enabled. Any ideas what I am doing wrong ?
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Snap mouse to grid?
Hello!I am new to PCB editor, although i have some experience with Cadence's Entry_CIS. I've read "Complete PCB Design Using OrCAD Capture and PCB Editor"Just a couple quick questions:1) What is the...
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DFA ???
Hi All,DFA - Design For Assembly.I have a question. How to view the bubble with DRC in quick placed component ? While moving the components with move option. Is it possible ?Note: Attached the image...
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outer annual ring (oar) DRC rule
Hi All,I was wondering if there is a way to set a outer annula ring (oar) DRC rule in Allegro 16.6Many Thanks,Nik
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LP Wizard and Allegro
Anyone use LP Wizard with Allegro? For some reason I am getting an error during footprint creation :ERROR(SPMHCS-1): SYMBOL MISSING A REFDES.Create symbol aborted.Any suggestions?
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Capture.ini configuration and Show Footprint in Capture
Hi,I have a few computers that I setup the Capture.ini file via the environmental variable %HOME%, some work some don't. Ones that do not work spit out the following warning in the Session Log with the...
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Package design and SiP license
Hello,I need a tool to extract package parasites for a RF design. I noted that SiP tools could make this work.My only available license relative to SiP is SiP_Layout_XL. I tried to run SiP Architect...
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Can Allegro 16.6 export PCBs to IGES files?
i know that it can export step files.can it export iges as well?
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"Thru Pin to Thru Via Spacing" Error?
Hi,I read somewhere that using spacer holes like below is a wise way.I am trying to put some via around the pad of my spacer footprint. However, I receive DRC errors (Thru Pin to Thru Via Spacing) when...
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Multilayer PCBs - Points to be considered while Manufacturing
Multilayer PCBs are considered the epitome of Design for Manufacturability (DFM). They comprise complex designs, and are produced using high grade materials. They are designed to support intricate...
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Connecting between two pins in a single package. (without schematic!)(Simple...
I'm using OrCAD PCB Designer version 16.6.And I'm designing a very simple and small PCB to connect between two electronic parts. So I created a PCB without using schematics from OrCAD...
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duplicate drill hole?
Hi All,I have a question. Where can I find documentation for duplicate drill hole?I used this link but that did not work:...
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Pspice Command Line Export .Dat to CSV
I am using psp_cmd.exe to run Orcad pspice simulations. I would like a way to export these .dat files to text files for further parsing and plotting (I am using Python, not MATLAB). Is there command...
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Special component
Hello,I have to crate a new package in OrCad PCB. It consists of two thruhole pins,like a wired resitor. Instead of mounting a component there is only a piece ofcopper on the etch top layer. When I...
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Allegro footprint apa102c was not found in the search path.
Hi,I'm trying to link a footprint with a part in Capture but I'm running into the error in the title. I tried editing the psmpath in the Environment Editor like I've seen people suggest on other posts...
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Pad shapes?
Hello all.In pad_designer, i need to choose geometry: shape-> *shape file*where in the world of cadence do I make the shape/mask file?
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Simulation of clock signal to determine presence of high speed effects
I have a multi-chip module for which it needs to be determined if the two clock signal shall suffer from high speed effects.I have the IBIS models of all the parts connected to the clock sources,...
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Via design
Greetings all friends around the world,I'm a newbie in this forum and newbie in using Allegro. I need someone to assist me about via that I design, please refer an attachment for an image.Why is via 1...
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PCB Editor 16.60: Changing the Default Template ?
Does anyone know where the default bord and/or symbol templates are stored?It would be nice to be able to change these to my own preferences w/o havingto load a specific one that (of course) does not...
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OrCAD Capture DRC does not catch dangling off-page
Hi Cadence Community,I have a design with two pages:Page 1 has a component with 3 passive pins, 2 of which are connected to a named net and the remaining pin is unconnected. There are 3 named off-page...
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